TerosHDL

Teros HDL

An open-source IDE for FPGA

Teros HDL

An open-source IDE for FPGA

Support the Project

You can help us to improve the IDE by donnating

Any feedback is welcome!

Support the Project

You can help us to improve the IDE by donnating

Any feedback is welcome!

What is Teros HDL?

Develop hardware, take advantage of software tools.

We are working on a open-source IDE that brings all facilities of software code tools to the FPGA development.

Linux Support

VHDL

GHDL

Vunit

Coco Tb

Comming soon!

And much more in the future!

Windows Support

Verilog

Comming soon!

ModelSim

Verilator

Cooming soon!

Edalize

Cooming soon!

What is supported in Teros HDL?

 

Linux Support

Windows Support

VHDL

Verilog

Comming soon!

ModelSim

GHDL

Vunit

Verilator

Cooming soon!

Coco Tb

Comming soon!

Edalize

Comming soon!

And much more in the future!

What Can I Do with TerosHDL?

TerosHDL

Runing test

TerosHDL

Code coverage

TerosHDL

Creating component diagram

TerosHDL

Structure view

TerosHDL

State machine diagram

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